We investigate the influence of gate-source/drain （G-S/D） misalignment on the performance of bulk fin field effect transistors （FinFETs） through the three-dimensional （3D） full band Monte Carlo simulator. Severa...We investigate the influence of gate-source/drain （G-S/D） misalignment on the performance of bulk fin field effect transistors （FinFETs） through the three-dimensional （3D） full band Monte Carlo simulator. Several scat- tering mechanisms, such as acoustic and optical phonon scattering, ionized impurity scattering, impact ionization scattering and surface roughness scattering are considered in our simulator. The influence of G-S/D overlap and underlap on the on-states performance and carrier transport of bulk FinFETs are mainly discussed in our work. Our results show that the on-states currents increase with the increment of G-D/S overlap length and the positions of a potential barrier and average electron energy maximum vary with the G-D/S overlap length. The carrier transport phenomena in bulk FinFETs are due to the effect of scattering and the electric field in the overlap/underlap regime.展开更多
In this paper, we investigate the performance of the bulk fin field effect transistor （FinFET） through a three- dimensional （3D） full band Monte Carlo simulator with quantum correction. Several scattering mechanis...In this paper, we investigate the performance of the bulk fin field effect transistor （FinFET） through a three- dimensional （3D） full band Monte Carlo simulator with quantum correction. Several scattering mechanisms, such as the acoustic and optical phonon scattering, the ionized impurity scattering, the impact ionization scattering and the surface roughness scattering are considered in our simulator. The effects of the substrate bias and the surface roughness scattering near the Si/SiO2 interface on the performance of bulk FinFET are mainly discussed in our work. Our results show that the on-current of bulk FinFET is sensitive to the surface roughness and that we can reduce the substrate leakage current by modulating the substrate bias voltage.展开更多
基金Project supported by the National Fundamental Basic Research Program of China(No.2011CBA00604)
文摘We investigate the influence of gate-source/drain （G-S/D） misalignment on the performance of bulk fin field effect transistors （FinFETs） through the three-dimensional （3D） full band Monte Carlo simulator. Several scat- tering mechanisms, such as acoustic and optical phonon scattering, ionized impurity scattering, impact ionization scattering and surface roughness scattering are considered in our simulator. The influence of G-S/D overlap and underlap on the on-states performance and carrier transport of bulk FinFETs are mainly discussed in our work. Our results show that the on-states currents increase with the increment of G-D/S overlap length and the positions of a potential barrier and average electron energy maximum vary with the G-D/S overlap length. The carrier transport phenomena in bulk FinFETs are due to the effect of scattering and the electric field in the overlap/underlap regime.
基金Project supported by the National Basic Research Program of China (Grant No. 2011CBA00604)
文摘In this paper, we investigate the performance of the bulk fin field effect transistor （FinFET） through a three- dimensional （3D） full band Monte Carlo simulator with quantum correction. Several scattering mechanisms, such as the acoustic and optical phonon scattering, the ionized impurity scattering, the impact ionization scattering and the surface roughness scattering are considered in our simulator. The effects of the substrate bias and the surface roughness scattering near the Si/SiO2 interface on the performance of bulk FinFET are mainly discussed in our work. Our results show that the on-current of bulk FinFET is sensitive to the surface roughness and that we can reduce the substrate leakage current by modulating the substrate bias voltage.
