Electrical ground looks simple on a schematic; unfortunately, the actual performance of a circuit is dictated by its layout （and by its printed-circuit-board）. When the ground node moves, system performance suffers ...Electrical ground looks simple on a schematic; unfortunately, the actual performance of a circuit is dictated by its layout （and by its printed-circuit-board）. When the ground node moves, system performance suffers and the system radiates electromagnetic interferences. But the understanding of the physics of ground noise can provide an intuitive sense for reducing the problem. Ground bounce can produce transients with amplitudes of volts; most often changing magnetic flux is the cause; in this work, the authors use a Finite-Difference Time-Domain to begin to understand such phenomena. Additionally, predicting substrate cross-talks in mixed-signal circuits has become a critical issue to preserve signal integrity in future integrated systems. Phenomena that involve parasitic signal propagation into the substrate are discussed. A simple methodology to predict the substrate cross-talk and some associated tools are presented. Finally, the authors indicate a stochastic method which could grasp both outer or inner RF （Radio-Frequency） radiations and substrate parasites.展开更多
This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large...This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^＋ guard.ring （PGR）, an n^＋ guard-ring （NGR）,and a deep-n-well （DNW） for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR ＋ NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.展开更多
文摘Electrical ground looks simple on a schematic; unfortunately, the actual performance of a circuit is dictated by its layout （and by its printed-circuit-board）. When the ground node moves, system performance suffers and the system radiates electromagnetic interferences. But the understanding of the physics of ground noise can provide an intuitive sense for reducing the problem. Ground bounce can produce transients with amplitudes of volts; most often changing magnetic flux is the cause; in this work, the authors use a Finite-Difference Time-Domain to begin to understand such phenomena. Additionally, predicting substrate cross-talks in mixed-signal circuits has become a critical issue to preserve signal integrity in future integrated systems. Phenomena that involve parasitic signal propagation into the substrate are discussed. A simple methodology to predict the substrate cross-talk and some associated tools are presented. Finally, the authors indicate a stochastic method which could grasp both outer or inner RF （Radio-Frequency） radiations and substrate parasites.
文摘This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^＋ guard.ring （PGR）, an n^＋ guard-ring （NGR）,and a deep-n-well （DNW） for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR ＋ NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.
