Surface modification techniques with plasma are widely investigated to improve the surface insulation capability of polymers under dry conditions,while the relationship between treatment method,surface physical and ch...Surface modification techniques with plasma are widely investigated to improve the surface insulation capability of polymers under dry conditions,while the relationship between treatment method,surface physical and chemical properties,and wet flashover voltage is still unclear for inorganic ceramics.In this work,the surface insulation properties of ceramics under wet conditions are improved using nanosecond-pulsed dielectric barrier discharge with polydimethylsiloxane(PDMS)as the precursor.The relationships between PDMS concentration and the water contact angle,dry and wet flashover voltages are obtained to acquire the optimal concentration.The surface charge dissipation test and surface physio-chemical property measurement with SEM,AFM,XPS are carried out to further explore the mechanism of surface insulation enhancement.The results show that film deposition with micron thickness and superhydrophobicity occurs at the PDMS concentration of 1.5%.The dry flashover voltage is increased by 14.6%due to the induction of deep traps,while the wet flashover voltage is increased by 66.7%.The gap between dry-wet flashover voltage is decreased by 62.3%compared with the untreated one due to the self-cleaning effect.展开更多
Memristive stateful logic is one of the most promising candidates to implement an in-memory computing system that computes within the storage unit.It can eliminate the costs for the data movement in the traditional vo...Memristive stateful logic is one of the most promising candidates to implement an in-memory computing system that computes within the storage unit.It can eliminate the costs for the data movement in the traditional von Neumann system.However,the instability in the memristors is inevitable due to the limitation of the current fabrication technology,which incurs a great challenge for the reliability of the memristive stateful logic.In this paper,the implication of device instability on the reliability of the logic event is simulated.The mathematical relationship between logic reliability and redundancy has been deduced.By combining the mathematical relationship with the vector-matrix multiplication in a memristive crossbar array,the logic error correction scheme with high throughput has been proposed.Moreover,a universal design paradigm has been put forward for complex logic.And the circuit schematic and the flow of the scheme have been raised.Finally,a 1-bit full adder(FA)based on the NOR logic and NOT logic is simulated and the mathematical evaluation is performed.It demonstrates the scheme can improve the reliability of the logic significantly.And compared with other four error corrections,the scheme which can be suitable for all kinds of R–R logics and V–R logics has the best universality and throughput.Compared with the other two approaches which also need additional complementary metal–oxide semiconductor(CMOS)circuits,it needs fewer transistors and cycles for the error correction.展开更多
基金国家自然科学基金项目(No.81773894)福建省自然科学基金杰出青年项目(No.2019J06021)资助supported by the NSFC(No.81773894)the Natural Science Funds of Fujian Province for Distinguished Young Scholar(No.2019J06021)。
基金partially supported by National Natural Science Foundation of China(Nos.51977104,52037004 and 52207160)the Natural Science Foundation of Jiangsu Province(No.BK20220341)。
文摘Surface modification techniques with plasma are widely investigated to improve the surface insulation capability of polymers under dry conditions,while the relationship between treatment method,surface physical and chemical properties,and wet flashover voltage is still unclear for inorganic ceramics.In this work,the surface insulation properties of ceramics under wet conditions are improved using nanosecond-pulsed dielectric barrier discharge with polydimethylsiloxane(PDMS)as the precursor.The relationships between PDMS concentration and the water contact angle,dry and wet flashover voltages are obtained to acquire the optimal concentration.The surface charge dissipation test and surface physio-chemical property measurement with SEM,AFM,XPS are carried out to further explore the mechanism of surface insulation enhancement.The results show that film deposition with micron thickness and superhydrophobicity occurs at the PDMS concentration of 1.5%.The dry flashover voltage is increased by 14.6%due to the induction of deep traps,while the wet flashover voltage is increased by 66.7%.The gap between dry-wet flashover voltage is decreased by 62.3%compared with the untreated one due to the self-cleaning effect.
基金Project supported by the National Key Research and Development Plan of the Ministry of Science of Technology of China (Grand Nos.2019YFB 2205100 and 2019YFB2205102)the National Natural Science Foundation of China (Grant Nos.61974164,62074166,61804181,62004219,and 62004220)the Science Support Program of the National University of Defense and Technology (Grand No.ZK20-06)。
文摘Memristive stateful logic is one of the most promising candidates to implement an in-memory computing system that computes within the storage unit.It can eliminate the costs for the data movement in the traditional von Neumann system.However,the instability in the memristors is inevitable due to the limitation of the current fabrication technology,which incurs a great challenge for the reliability of the memristive stateful logic.In this paper,the implication of device instability on the reliability of the logic event is simulated.The mathematical relationship between logic reliability and redundancy has been deduced.By combining the mathematical relationship with the vector-matrix multiplication in a memristive crossbar array,the logic error correction scheme with high throughput has been proposed.Moreover,a universal design paradigm has been put forward for complex logic.And the circuit schematic and the flow of the scheme have been raised.Finally,a 1-bit full adder(FA)based on the NOR logic and NOT logic is simulated and the mathematical evaluation is performed.It demonstrates the scheme can improve the reliability of the logic significantly.And compared with other four error corrections,the scheme which can be suitable for all kinds of R–R logics and V–R logics has the best universality and throughput.Compared with the other two approaches which also need additional complementary metal–oxide semiconductor(CMOS)circuits,it needs fewer transistors and cycles for the error correction.
