By mapping a fixed polarity Reed-Muller (RM) expression into an onset table and studying the properties of the onset table,an algorithm is proposed to obtain a compact multi-level single-output mixed-polarity RM funct...By mapping a fixed polarity Reed-Muller (RM) expression into an onset table and studying the properties of the onset table,an algorithm is proposed to obtain a compact multi-level single-output mixed-polarity RM function by searching for and extracting the common variables using the onset table.Furthermore,by employing the multiplexer model,the algorithm is extended to optimize multi-level multi-output mixed-polarity RM forms.The proposed algorithm is implemented in C language and tested using some MCNC benchmarks.Experimental results show that the proposed algorithm can obtain a more compact RM form than that under fixed polarity.Compared with published results,the proposed algorithm makes a significant speed improvement,with a small increase in the number of literals.展开更多
Nanoelectronics constructed by nanoscale devices seems promising for the advanced development of integrated circuits （ICs）. However, the lack of computer aided design （CAD） tools seriously hinders its development ...Nanoelectronics constructed by nanoscale devices seems promising for the advanced development of integrated circuits （ICs）. However, the lack of computer aided design （CAD） tools seriously hinders its development and applications. To investigate the cell mapping task in CAD flow, we present a genetic algorithm （GA） based method for Cmos/nanowire/MOLecular hybrid （CMOL）, which is a nanohybrid circuit architecture. By designing several crossover operators and analyzing their performance, an efficient crossover operator is proposed. Combining a mutation operator, a GA based algorithm is presented and tested on the International Symposium on Circuits and Systems （ISCAS） benchmarks. The results show that the proposed method not only can obtain better area utilization and smaller delay, but also can handle larger benchmarks with CPU time improvement compared with the published methods.展开更多
近似计算技术通过降低电路输出精度实现电路功耗、面积、速度等方面的优化.本文针对RM(Reed-Muller)逻辑中“异或”运算特点,提出了基于近似计算技术的适合FPRM逻辑的电路面积优化算法,包括基于不相交运算的RM逻辑错误率计算方法,及在...近似计算技术通过降低电路输出精度实现电路功耗、面积、速度等方面的优化.本文针对RM(Reed-Muller)逻辑中“异或”运算特点,提出了基于近似计算技术的适合FPRM逻辑的电路面积优化算法,包括基于不相交运算的RM逻辑错误率计算方法,及在错误率约束下,有利于面积优化的近似FPRM函数搜索方法等.优化算法用MCNC (Microelectronics Center of North Carolina)电路进行测试.实验结果表明,提出的算法可以处理输入变量个数为199个的大电路,在平均错误率为5.7%下,平均电路面积减少62.0%,并在实现面积优化的同时有利于实现电路的动态功耗的优化且对电路时延影响不大.展开更多
基金Project supported by the National Natural Science Foundation of China (Nos.60871022 and 61041001)the Natural Science Foundation of Zhejiang Province (Nos.Z1090622 and Y1080654)the Ningbo Natural Science Foundation,China (No.2010A610183)
文摘By mapping a fixed polarity Reed-Muller (RM) expression into an onset table and studying the properties of the onset table,an algorithm is proposed to obtain a compact multi-level single-output mixed-polarity RM function by searching for and extracting the common variables using the onset table.Furthermore,by employing the multiplexer model,the algorithm is extended to optimize multi-level multi-output mixed-polarity RM forms.The proposed algorithm is implemented in C language and tested using some MCNC benchmarks.Experimental results show that the proposed algorithm can obtain a more compact RM form than that under fixed polarity.Compared with published results,the proposed algorithm makes a significant speed improvement,with a small increase in the number of literals.
基金supported by the National Natural Science Foundation of China under Grant Nos. 61131001, 60871022, 61041001Natural Science Foundation of the Zhejiang Province of China under Grant Nos. Z1090622, Y1080654K.C.Wong Magna Fund from Ningbo University
文摘Nanoelectronics constructed by nanoscale devices seems promising for the advanced development of integrated circuits （ICs）. However, the lack of computer aided design （CAD） tools seriously hinders its development and applications. To investigate the cell mapping task in CAD flow, we present a genetic algorithm （GA） based method for Cmos/nanowire/MOLecular hybrid （CMOL）, which is a nanohybrid circuit architecture. By designing several crossover operators and analyzing their performance, an efficient crossover operator is proposed. Combining a mutation operator, a GA based algorithm is presented and tested on the International Symposium on Circuits and Systems （ISCAS） benchmarks. The results show that the proposed method not only can obtain better area utilization and smaller delay, but also can handle larger benchmarks with CPU time improvement compared with the published methods.
文摘近似计算技术通过降低电路输出精度实现电路功耗、面积、速度等方面的优化.本文针对RM(Reed-Muller)逻辑中“异或”运算特点,提出了基于近似计算技术的适合FPRM逻辑的电路面积优化算法,包括基于不相交运算的RM逻辑错误率计算方法,及在错误率约束下,有利于面积优化的近似FPRM函数搜索方法等.优化算法用MCNC (Microelectronics Center of North Carolina)电路进行测试.实验结果表明,提出的算法可以处理输入变量个数为199个的大电路,在平均错误率为5.7%下,平均电路面积减少62.0%,并在实现面积优化的同时有利于实现电路的动态功耗的优化且对电路时延影响不大.
