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A New Topology for a Single Phase Multilevel Voltage Source Inverter with Reduced Number of Components
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作者 Lijo Jacob Varghese c. kezi selva vijila I. Jacob Ragland 《Circuits and Systems》 2016年第4期475-488,共14页
Multilevel inverters have gained much attention for its operation involving applications ranging values of high power rating. This paper proposes a switching topology for asymmetric multilevel inverter utilizing less ... Multilevel inverters have gained much attention for its operation involving applications ranging values of high power rating. This paper proposes a switching topology for asymmetric multilevel inverter utilizing less number of power electronics components. When the number of the output level increases, it requires more switching states and eventually the number of switching components. The increased number of switches results in higher switching losses which may lead to power loss, and reduction of efficiency of the overall conversion system. The salient feature of this proposed topology is that the module can be used as a sub multiple level structure and can be extended for any number of level with minimal increase in the switching components. 展开更多
关键词 Multilevel Inverter Asymmetrical Inverter Reduction of Components Loss Calculation Total Harmonic Distortion
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Energy Aware Processor Architecture for Effective Scheduling and Power Management in Cloud Using Inclusive Power-Cognizant Processor Controller
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作者 Suma Sira Jacob c. kezi selva vijila 《Circuits and Systems》 2016年第8期1822-1833,共13页
The fast acceptance of cloud technology to industry explains increasing energy conservation needs and adoption of energy aware scheduling methods to cloud. Power consumption is one of the top of mind issues in cloud, ... The fast acceptance of cloud technology to industry explains increasing energy conservation needs and adoption of energy aware scheduling methods to cloud. Power consumption is one of the top of mind issues in cloud, because the usage of cloud storage by the individuals or organization grows rapidly. Developing an efficient power management processor architecture has gained considerable attention. However, the conventional power management mechanism fails to consider task scheduling policies. Therefore, this work presents a novel energy aware framework for power management. The proposed system leads to the development of Inclusive Power-Cognizant Processor Controller (IPCPC) for efficient power utilization. To evaluate the performance of the proposed method, simulation experiments inputting random tasks as well as tasks collected from Google Trace Logs were conducted to validate the supremacy of IPCPC. The research based on Real world Google Trace Logs gives results that proposed framework leads to less than 9% of total power consumption per task of server which proves reduction in the overall power needed. 展开更多
关键词 Energy Efficiency Power Management Task Scheduling Virtual Machine Processor Architecture
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