我们利用0.18μm CM O S工艺设计了低噪声放大器。所有电感采用片上螺旋电感,全集成在单个芯片上,并实现片内50Ω匹配。本次电路设计分析采用ADS仿真软件,电源电压1V,工作电流8mA,增益为15.4dB,噪声系数2.7dB,线性度指标IIP 3为-0.6dB...我们利用0.18μm CM O S工艺设计了低噪声放大器。所有电感采用片上螺旋电感,全集成在单个芯片上,并实现片内50Ω匹配。本次电路设计分析采用ADS仿真软件,电源电压1V,工作电流8mA,增益为15.4dB,噪声系数2.7dB,线性度指标IIP 3为-0.6dB。结论是CM O S工艺在工艺和模型方面的改进,使得CM O S RF电路设计更为精确,可集成度更高。展开更多
A refinement of an analytical approximation of the surface potential in MOSFETs is proposed by introducing a high-order term. As compared to the conventional treatment with accuracy between 1nV and 0. 03mV in the case...A refinement of an analytical approximation of the surface potential in MOSFETs is proposed by introducing a high-order term. As compared to the conventional treatment with accuracy between 1nV and 0. 03mV in the cases with an oxide thickness tox = 1 ～ 10nm and substrate doping concentration Na = 1015 ～ 1018 cm-3 , this method yields an accuracy within about 1pV in all cases. This is comparable to numerical simulations, but does not require trading off much computation efficiency. More importantly, the spikes in the error curve associated with the traditional treatment are eliminated.展开更多
One group of SiC films are grown on silicon-on-insulator （SOI） substrates with a series of silicon-overlayer thickness. Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual...One group of SiC films are grown on silicon-on-insulator （SOI） substrates with a series of silicon-overlayer thickness. Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual stress reduction as the silicon over-layer thickness decreases for the SOI substrates. Strain relaxation in the SiC epilayer is explained by force balance approach and near coincidence lattice model.展开更多
A novel MEMS inductor consisting of a planar single crystalline silicon spiral with a copper surface coating as the conductor is presented. Using a silicon-glass anodic bonding and deep etching formation-and-release p...A novel MEMS inductor consisting of a planar single crystalline silicon spiral with a copper surface coating as the conductor is presented. Using a silicon-glass anodic bonding and deep etching formation-and-release process,a 40μm-thick silicon spiral is formed, which is suspended on a glass substrate to eliminate substrate loss. The surfaces of the silicon spiral are coated with highly conformal copper by electroless plating to reduce the resis- tive loss in the conductor,with thin nickel film plated on the surface of the copper layer for final surface passivation. The fabricated inductor exhibits a self-resonance frequency higher than 15GHz,with a quality factor of about 40 and an inductance of over 5nil at 11.3GHz. Simulations based on a compact equivalent circuit model of the inductor and parameter extraction using a characteristic-function approach are carried out,and good agreement with measurements is obtained.展开更多
文摘我们利用0.18μm CM O S工艺设计了低噪声放大器。所有电感采用片上螺旋电感,全集成在单个芯片上,并实现片内50Ω匹配。本次电路设计分析采用ADS仿真软件,电源电压1V,工作电流8mA,增益为15.4dB,噪声系数2.7dB,线性度指标IIP 3为-0.6dB。结论是CM O S工艺在工艺和模型方面的改进,使得CM O S RF电路设计更为精确,可集成度更高。
文摘A refinement of an analytical approximation of the surface potential in MOSFETs is proposed by introducing a high-order term. As compared to the conventional treatment with accuracy between 1nV and 0. 03mV in the cases with an oxide thickness tox = 1 ～ 10nm and substrate doping concentration Na = 1015 ～ 1018 cm-3 , this method yields an accuracy within about 1pV in all cases. This is comparable to numerical simulations, but does not require trading off much computation efficiency. More importantly, the spikes in the error curve associated with the traditional treatment are eliminated.
文摘One group of SiC films are grown on silicon-on-insulator （SOI） substrates with a series of silicon-overlayer thickness. Raman scattering spectroscopy measurement clearly indicates that a systematic trend of residual stress reduction as the silicon over-layer thickness decreases for the SOI substrates. Strain relaxation in the SiC epilayer is explained by force balance approach and near coincidence lattice model.
文摘A novel MEMS inductor consisting of a planar single crystalline silicon spiral with a copper surface coating as the conductor is presented. Using a silicon-glass anodic bonding and deep etching formation-and-release process,a 40μm-thick silicon spiral is formed, which is suspended on a glass substrate to eliminate substrate loss. The surfaces of the silicon spiral are coated with highly conformal copper by electroless plating to reduce the resis- tive loss in the conductor,with thin nickel film plated on the surface of the copper layer for final surface passivation. The fabricated inductor exhibits a self-resonance frequency higher than 15GHz,with a quality factor of about 40 and an inductance of over 5nil at 11.3GHz. Simulations based on a compact equivalent circuit model of the inductor and parameter extraction using a characteristic-function approach are carried out,and good agreement with measurements is obtained.
