Hafnium zirconium oxides(HZO),which exhibit ferroelectric properties,are promising materials for nanoscale device fabrication due to their high complementary metal-oxide-semiconductor(CMOS) compatibility.In addition t...Hafnium zirconium oxides(HZO),which exhibit ferroelectric properties,are promising materials for nanoscale device fabrication due to their high complementary metal-oxide-semiconductor(CMOS) compatibility.In addition to piezoelectricity,ferroelectricity,and flexoelectricity,this study reports the observation of ferroelasticity using piezoelectric force microscopy(PFM) and scanning transmission electron microscopy(STEM).The dynamics of 90° ferroelastic domains in HZO thin films are investigated under the influence of an electric field.Switching of the retentive domains is observed through repeated wake-up measurements.This study presents a possibility of enhancing polarization in HZO thin films during wake-up processes.展开更多
本文讨论了非硅微电子学,即在硅衬底上利用非硅沟道材料实现互补型金属氧化物半导体(Complememaw Metal Oxide Semiconductor,CMOS)集成电路的微电子科学与技术.文章重点综述了高迁移率锗与锗锡沟道金属氧化物半导体场效应晶体管(Metal ...本文讨论了非硅微电子学,即在硅衬底上利用非硅沟道材料实现互补型金属氧化物半导体(Complememaw Metal Oxide Semiconductor,CMOS)集成电路的微电子科学与技术.文章重点综述了高迁移率锗与锗锡沟道金属氧化物半导体场效应晶体管(Metal Oxide Semiconductor Field Effect Transistor,MOSFET)以及隧穿场效应晶体管(Tunneling Field Effect Transistor,TFET)的研究进展.锗与锗锡具有比硅(Si)材料高的空穴和电子迁移率且容易实现硅衬底集成,是实现高迁移率沟道CMOS器件的理想备选材料.通过调节锡组分,锗锡材料可实现直接带隙结构,从而获得较高的带间隧穿几率,理论和实验证明可用锗锡实现高性能TFET器件.本文具体分析了锗锡MOSFETs和TFETs器件在材料生长、表面钝化、栅叠层、源漏工程、应变工程及器件可靠性等关键问题.展开更多
The temperature is a key factor for the quality of the SiGe alloy grown by D-UHV/CVD. In conventional conditions,the lowest temperature for SiGe growth is about 550℃. Generally, the pressure of the growth chamber is ...The temperature is a key factor for the quality of the SiGe alloy grown by D-UHV/CVD. In conventional conditions,the lowest temperature for SiGe growth is about 550℃. Generally, the pressure of the growth chamber is about 10 ^-5 Pa when liquid nitrogen is introduced into the wall of the growth chamber with the flux of 6sccm of the disilane gas. We have succeeded in depositing SiGe films at much lower temperature using a novel method. It is about 10.2 Pa without liquid nitrogen, about 3 magnitudes higher than the traditional method,leading to much faster deposition rate. Without liquid nitrogen,the SiGe film and SiGe/Si superlattice are grown at 485℃. The DCXRD curves and TEM image show that the quality of the film is good. The experiments show that this method is efficient to deposit SiGe at low temperature.展开更多
Ge self-assembled quantum dots （SAQDs） are grown with a self-assembled UHV/CVD epitaxy system. Then, the as-grown Ge quantum dots are annealed by ArF excimer laser. In the ultra-shot laser pulse duration, -20ns, bul...Ge self-assembled quantum dots （SAQDs） are grown with a self-assembled UHV/CVD epitaxy system. Then, the as-grown Ge quantum dots are annealed by ArF excimer laser. In the ultra-shot laser pulse duration, -20ns, bulk diffusion is forbidden,and only surface diffusion occurs, resulting in a laser induced quantum dot （LIQD）. The diameter of the LIQD is 20-25nm which is much smaller than the as-grown dot and the LIQD has a higher density of about 6 ×10^10cm^-2. The surface morphology evolution is investigated by AFM.展开更多
We present different relaxation mechanisms of Ge and SiGe quantum dots under excimer laser annealing. Investigation of the coarsening and relaxation of the dots shows that the strain in Ge dots on Ge films is relaxed ...We present different relaxation mechanisms of Ge and SiGe quantum dots under excimer laser annealing. Investigation of the coarsening and relaxation of the dots shows that the strain in Ge dots on Ge films is relaxed by dislocation since there is no interface between the Ge dots and the Ge layer, while the SiGe dots on Si0.77Ge0.23 film relax by lattice distortion to coherent dots, which results from the obvious interface between the SiGe dots and the Si0.77Ge0.23 film. The results are suggested and sustained by Vanderbilt and Wickham＇s theory, and also demonstrate that no bulk diffusion occurs during the excimer laser annealing.展开更多
We investigate negative bias temperature instability （NBTI） on high performance Ge p-channel metal-oxide- semiconductor field-effect transistors （pMOSFETs） with low-temperature Si2H6 passivation. The Ge pMOSFETs e...We investigate negative bias temperature instability （NBTI） on high performance Ge p-channel metal-oxide- semiconductor field-effect transistors （pMOSFETs） with low-temperature Si2H6 passivation. The Ge pMOSFETs exhibit an effective hole mobility of 311 cm2/V.s at an inversion charge density of 2.5 × 1012 cm^-2. NBTI characterization is performed to investigate the linear transconductance （GM,lin） degradation and threshold voltage shift （△VTH） under NBT stress. Ge pMOSFETs with a lOyr lifetime at an operating voltage of -0.72 V are demonstrated. The impact of the Si2H6 passivation temperature is studied. As the passivation temperature increases from 350℃ to 550℃, the degradation of NBTI characteristics, e.g., GM,lin loss, △VTH and an operating voltage for a lifetime of lOyr, is observed.展开更多
We investigate the phonon limited electron mobility in germanium(Ge) fin field-effect transistors(FinFETs)with fin rotating within(001),(110),and(111)-oriented wafers. The coupled Schrodinger-Poisson equations are sol...We investigate the phonon limited electron mobility in germanium(Ge) fin field-effect transistors(FinFETs)with fin rotating within(001),(110),and(111)-oriented wafers. The coupled Schrodinger-Poisson equations are solved self-consistently to calculate the electronic structures for the two-dimensional electron gas, and Fermi's golden rule is used to calculate the phonon scattering rate. It is concluded that the intra-valley acoustic phonon scattering is the dominant mechanism limiting the electron mobility in Ge FinFETs. The phonon limited electron motilities are influenced by wafer orientation, channel direction, in thickness Wfin, and inversion charge density Ninv. With the fixed Wfin, fin directions of(110),(112) and(110) within(001),(110), and(111)-oriented wafers provide the maximum values of electron mobility. The optimized for mobility is also dependent on wafer orientation and channel direction. As Ninv, increases, phonon limited mobility degrades, which is attributed to electron repopulation from a higher mobility valley to a lower mobility valley as Ninv increases.展开更多
Germanium-tin(Ge_(1-x)Sn_(x))p-type metal-oxide-semiconductor field effect transistors(pMOSFETs)were fabricated using a strained Ge_(0.985)Sn_(0.015) thin film that was epitaxially grown on a silicon-on-insulator subs...Germanium-tin(Ge_(1-x)Sn_(x))p-type metal-oxide-semiconductor field effect transistors(pMOSFETs)were fabricated using a strained Ge_(0.985)Sn_(0.015) thin film that was epitaxially grown on a silicon-on-insulator substrate with a relaxed Ge buffer layer.The Ge buffer was deposited using a two-step chemical vapor deposition growth technique.The high quality Ge_(0.985)Sn_(0.015) layer was grown by solid source molecular beam epitaxy.Ge_(0.985)Sn_(0.015) pMOSFETs with Si surface passivation,TaN/HfO_(2) gate stack,and nickel stanogermanide[Ni(Ge_(1-x)Sn_(x))]source/drain were fabricated on the grown substrate.The device achieves an effective hole mobility of 182 cm^(2)/V·s at an inversion carrier density of 1×10^(13) cm^(-2).展开更多
We fabricated n-type Si-based TFETs with a Ge source on Si（110） substrate. The temperature dependent IDS-VGS characteristics of a TFET formed on Si（110） are investigated in the temperature range of 210 to 300 K. A...We fabricated n-type Si-based TFETs with a Ge source on Si（110） substrate. The temperature dependent IDS-VGS characteristics of a TFET formed on Si（110） are investigated in the temperature range of 210 to 300 K. A study of the temperature dependence of/Leakage indicates that/Leakage is mainly dominated by the Shockley-Read- Hall （SRH） generation-recombination current of the n＋ drain-Si substrate junction, ION increases monotonically with temperature, which is attributed to a reduction of the bandgap at the tunneling junction and an enhancement of band-to-band tunneling rate. The subthreshold swing S for trap assisted tunneling （TAT） current and band-to- band tunneling （BTBT） current shows the different temperature dependence. The subthreshold swing S for the TAT current degrades with temperature, while the S for BTBT current is temperature independent.展开更多
TiO2deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmiss...TiO2deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmission electron microscopy indicate that the lower deposition temperature tends to effectively eliminate the formation of GeOxto reduce the tunneling resistance. Compared with TiO2deposited at higher temperature of 250°C,there are more oxygen vacancies in lower-temperature-deposited TiO2, which will dope TiO2contributing to the lower tunneling resistance. Al/TiO2/n-Ge metal-insulator-semiconductor diodes with 2 nm 120°C deposited TiO2achieves 2496 times of current density at-0.1 V compared with the device without the TiO2interface layer case, and is 8.85 times larger than that with 250°C deposited TiO2. Thus inserting extremely low temperature deposited TiO2to depin the Fermi level for n-Ge may be a better choice.展开更多
基金Project supported by the the National Key Research and Development Program of China (Grant No. 2022YFA1402902)the National Natural Science Foundation of China (Grant Nos. 12074119, 12204171, 12134003, and 12374145)+1 种基金the Chenguang Program Foundation of Shanghai Education Development Foundation and Shanghai Municipal Education Commission, ECNU (East China Normal University) Multifunctional Platform for Innovation (006)the Fundamental Research Funds for the Central Universities。
文摘Hafnium zirconium oxides(HZO),which exhibit ferroelectric properties,are promising materials for nanoscale device fabrication due to their high complementary metal-oxide-semiconductor(CMOS) compatibility.In addition to piezoelectricity,ferroelectricity,and flexoelectricity,this study reports the observation of ferroelasticity using piezoelectric force microscopy(PFM) and scanning transmission electron microscopy(STEM).The dynamics of 90° ferroelastic domains in HZO thin films are investigated under the influence of an electric field.Switching of the retentive domains is observed through repeated wake-up measurements.This study presents a possibility of enhancing polarization in HZO thin films during wake-up processes.
基金supported by the National Natural Science Foundation of China(61874128 and 62174167)the Frontier Science Key Program of CAS(QYZDY-SSW-JSC032 and ZDBS-LY-JSC009)+2 种基金the Program of Shanghai Academic Research Leader(19XD1404600)K.C.Wong Education Foundation(GJTD-2019-11)the Key Research Project of Zhejiang Laboratory(2021MD0AC01)。
文摘本文讨论了非硅微电子学,即在硅衬底上利用非硅沟道材料实现互补型金属氧化物半导体(Complememaw Metal Oxide Semiconductor,CMOS)集成电路的微电子科学与技术.文章重点综述了高迁移率锗与锗锡沟道金属氧化物半导体场效应晶体管(Metal Oxide Semiconductor Field Effect Transistor,MOSFET)以及隧穿场效应晶体管(Tunneling Field Effect Transistor,TFET)的研究进展.锗与锗锡具有比硅(Si)材料高的空穴和电子迁移率且容易实现硅衬底集成,是实现高迁移率沟道CMOS器件的理想备选材料.通过调节锡组分,锗锡材料可实现直接带隙结构,从而获得较高的带间隧穿几率,理论和实验证明可用锗锡实现高性能TFET器件.本文具体分析了锗锡MOSFETs和TFETs器件在材料生长、表面钝化、栅叠层、源漏工程、应变工程及器件可靠性等关键问题.
文摘The temperature is a key factor for the quality of the SiGe alloy grown by D-UHV/CVD. In conventional conditions,the lowest temperature for SiGe growth is about 550℃. Generally, the pressure of the growth chamber is about 10 ^-5 Pa when liquid nitrogen is introduced into the wall of the growth chamber with the flux of 6sccm of the disilane gas. We have succeeded in depositing SiGe films at much lower temperature using a novel method. It is about 10.2 Pa without liquid nitrogen, about 3 magnitudes higher than the traditional method,leading to much faster deposition rate. Without liquid nitrogen,the SiGe film and SiGe/Si superlattice are grown at 485℃. The DCXRD curves and TEM image show that the quality of the film is good. The experiments show that this method is efficient to deposit SiGe at low temperature.
文摘Ge self-assembled quantum dots （SAQDs） are grown with a self-assembled UHV/CVD epitaxy system. Then, the as-grown Ge quantum dots are annealed by ArF excimer laser. In the ultra-shot laser pulse duration, -20ns, bulk diffusion is forbidden,and only surface diffusion occurs, resulting in a laser induced quantum dot （LIQD）. The diameter of the LIQD is 20-25nm which is much smaller than the as-grown dot and the LIQD has a higher density of about 6 ×10^10cm^-2. The surface morphology evolution is investigated by AFM.
基金Supported by the National Natural Science Foundation of China under Grant No 60576001.
文摘We present different relaxation mechanisms of Ge and SiGe quantum dots under excimer laser annealing. Investigation of the coarsening and relaxation of the dots shows that the strain in Ge dots on Ge films is relaxed by dislocation since there is no interface between the Ge dots and the Ge layer, while the SiGe dots on Si0.77Ge0.23 film relax by lattice distortion to coherent dots, which results from the obvious interface between the SiGe dots and the Si0.77Ge0.23 film. The results are suggested and sustained by Vanderbilt and Wickham＇s theory, and also demonstrate that no bulk diffusion occurs during the excimer laser annealing.
基金Supported by the Fundamental Research Funds for the Central Universities under Grant Nos 106112013CDJZR120015 and 106112013CDJZR120017, and the National Natural Science Foundation of China under Grant No 61334002.
文摘We investigate negative bias temperature instability （NBTI） on high performance Ge p-channel metal-oxide- semiconductor field-effect transistors （pMOSFETs） with low-temperature Si2H6 passivation. The Ge pMOSFETs exhibit an effective hole mobility of 311 cm2/V.s at an inversion charge density of 2.5 × 1012 cm^-2. NBTI characterization is performed to investigate the linear transconductance （GM,lin） degradation and threshold voltage shift （△VTH） under NBT stress. Ge pMOSFETs with a lOyr lifetime at an operating voltage of -0.72 V are demonstrated. The impact of the Si2H6 passivation temperature is studied. As the passivation temperature increases from 350℃ to 550℃, the degradation of NBTI characteristics, e.g., GM,lin loss, △VTH and an operating voltage for a lifetime of lOyr, is observed.
基金Supported by the National Natural Science Foundation of China under Grant Nos 61534004,61604112 and 61622405
文摘We investigate the phonon limited electron mobility in germanium(Ge) fin field-effect transistors(FinFETs)with fin rotating within(001),(110),and(111)-oriented wafers. The coupled Schrodinger-Poisson equations are solved self-consistently to calculate the electronic structures for the two-dimensional electron gas, and Fermi's golden rule is used to calculate the phonon scattering rate. It is concluded that the intra-valley acoustic phonon scattering is the dominant mechanism limiting the electron mobility in Ge FinFETs. The phonon limited electron motilities are influenced by wafer orientation, channel direction, in thickness Wfin, and inversion charge density Ninv. With the fixed Wfin, fin directions of(110),(112) and(110) within(001),(110), and(111)-oriented wafers provide the maximum values of electron mobility. The optimized for mobility is also dependent on wafer orientation and channel direction. As Ninv, increases, phonon limited mobility degrades, which is attributed to electron repopulation from a higher mobility valley to a lower mobility valley as Ninv increases.
基金Supported by the National Basic Research Program of China under Grant Nos 2013CB632103 and 2011CBA00608the National Natural Science Foundation of China under Grant Nos 61036003,61177038 and 61176013the Science Research Foundation of Huaqiao University under Grant 12BS221.
文摘Germanium-tin(Ge_(1-x)Sn_(x))p-type metal-oxide-semiconductor field effect transistors(pMOSFETs)were fabricated using a strained Ge_(0.985)Sn_(0.015) thin film that was epitaxially grown on a silicon-on-insulator substrate with a relaxed Ge buffer layer.The Ge buffer was deposited using a two-step chemical vapor deposition growth technique.The high quality Ge_(0.985)Sn_(0.015) layer was grown by solid source molecular beam epitaxy.Ge_(0.985)Sn_(0.015) pMOSFETs with Si surface passivation,TaN/HfO_(2) gate stack,and nickel stanogermanide[Ni(Ge_(1-x)Sn_(x))]source/drain were fabricated on the grown substrate.The device achieves an effective hole mobility of 182 cm^(2)/V·s at an inversion carrier density of 1×10^(13) cm^(-2).
基金Project supported by the Fundamental Research Funds for the Central Universities(Nos.106112013CDJZR120015,106112013CDJZR120017)
文摘We fabricated n-type Si-based TFETs with a Ge source on Si（110） substrate. The temperature dependent IDS-VGS characteristics of a TFET formed on Si（110） are investigated in the temperature range of 210 to 300 K. A study of the temperature dependence of/Leakage indicates that/Leakage is mainly dominated by the Shockley-Read- Hall （SRH） generation-recombination current of the n＋ drain-Si substrate junction, ION increases monotonically with temperature, which is attributed to a reduction of the bandgap at the tunneling junction and an enhancement of band-to-band tunneling rate. The subthreshold swing S for trap assisted tunneling （TAT） current and band-to- band tunneling （BTBT） current shows the different temperature dependence. The subthreshold swing S for the TAT current degrades with temperature, while the S for BTBT current is temperature independent.
基金Supported by the National Natural Science Foundation of China under Grant Nos 61534004,61604112 and 61622405
文摘TiO2deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmission electron microscopy indicate that the lower deposition temperature tends to effectively eliminate the formation of GeOxto reduce the tunneling resistance. Compared with TiO2deposited at higher temperature of 250°C,there are more oxygen vacancies in lower-temperature-deposited TiO2, which will dope TiO2contributing to the lower tunneling resistance. Al/TiO2/n-Ge metal-insulator-semiconductor diodes with 2 nm 120°C deposited TiO2achieves 2496 times of current density at-0.1 V compared with the device without the TiO2interface layer case, and is 8.85 times larger than that with 250°C deposited TiO2. Thus inserting extremely low temperature deposited TiO2to depin the Fermi level for n-Ge may be a better choice.
