高温可靠性是目前限制SiC MOSFET晶体管高温应用的关键问题之一。本文介绍了基于国内碳化硅器件工艺平台研制的1 200 V SiC MOSFET器件的直流特性,并通过高温栅偏(HTGB)和高温反偏(HTRB)试验对器件高温可靠性进行测试分析。试验结果表明...高温可靠性是目前限制SiC MOSFET晶体管高温应用的关键问题之一。本文介绍了基于国内碳化硅器件工艺平台研制的1 200 V SiC MOSFET器件的直流特性,并通过高温栅偏(HTGB)和高温反偏(HTRB)试验对器件高温可靠性进行测试分析。试验结果表明:所研制的1 200 V SiC MOSFET器件在经过168 h的HTGB和HTRB可靠性试验后,所有测试器件的击穿电压>1 200 V,阈值电压偏移量<15%,导通电阻偏移量<15%,显示出优良的器件鲁棒性,也初步证明了国产SiC MOSFET器件的设计、工艺及其研制的可行性。展开更多
Tung＇s model was used to analyze anomalies observed in Ti/Si C Schottky contacts. The degree of the inhomogeneous Schottky barrier after annealing at different temperatures is characterized by the ‘T0anomaly＇ and t...Tung＇s model was used to analyze anomalies observed in Ti/Si C Schottky contacts. The degree of the inhomogeneous Schottky barrier after annealing at different temperatures is characterized by the ‘T0anomaly＇ and the difference（△Φ）between the uniformly high barrier height（Φ0B） and the effective barrier height（Φeff B）. Those two parameters of Ti Schottky contacts on 4H–Si C were deduced from I–V measurements in the temperature range of 298 K–503 K. The increase in Schottky barrier（SB） height（ΦB） and decrease in the ideality factor（n） with an increase measurement temperature indicate the presence of an inhomogeneous SB. The degree of inhomogeneity of the Schottky barrier depends on the annealing temperature, and it is at its lowest for 500-°C thermal treatment. The degree of inhomogeneity of the SB could reveal effects of thermal treatments on Schottky contacts in other aspects.展开更多
The Ni/Ti/Ni multilayer ohmic contact properties on a 4H-SiC substrate and improved adhesion with the Ti/Au overlayer have been investigated. The best specific contact resistivity of 3.16 × 10^-5 Ω.cm^2 was obta...The Ni/Ti/Ni multilayer ohmic contact properties on a 4H-SiC substrate and improved adhesion with the Ti/Au overlayer have been investigated. The best specific contact resistivity of 3.16 × 10^-5 Ω.cm^2 was obtained at 1050 ℃. Compared with Ni/SiC ohmic contact, the adhesion between Ni/Ti/Ni/SiC and the Ti/Au overlayer was greatly improved and the physical mechanism under this behavior was analyzed by using Raman spectroscopy and X-ray energy dispersive spectroscopy （EDS） measurement. It is shown that a Ti-carbide and Ni-silicide compound exist at the surface and there is no graphitic carbon at the surface of the Ni/Ti/Ni structure by Raman spectroscopy, while a large amount of graphitic carbon appears at the surface of the Ni/SiC structure, which results in its bad adhesion. Moreover, the interface of the Ni/Ti/Ni/SiC is improved compared to the interface of Ni/SiC.展开更多
The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors （VDMOSFETs） are reported. The drift layer is 17μm in thickness with 5 × 10...The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors （VDMOSFETs） are reported. The drift layer is 17μm in thickness with 5 × 10^15 cm^-3 n-type doping, and the channel length is 1μm. The MOSFETs show a peak mobility of 17cm2/V.s and a typical threshold voltage of 3 V. The active area of 0.028cm2 delivers a forward drain current of 7A at Vcs = 22 V and VDS= 15 V. The specific on-resistance （Ron,sv） is 18mΩ.cm2 at VGS= 22 V and the blocking voltage is 1975 V （IDS 〈 lOOnA） at VGS = 0 V.展开更多
Charge trapping behavior and its origin in Al2O3/SiC MOS structure are investigated by analyzing the capacitance–voltage(C–V) hysteresis and the chemical composition of the interface. The C–V hysteresis is measured...Charge trapping behavior and its origin in Al2O3/SiC MOS structure are investigated by analyzing the capacitance–voltage(C–V) hysteresis and the chemical composition of the interface. The C–V hysteresis is measured as a function of oxide thickness series for an Al2O3/SiC MIS capacitor. The distribution of the trapped charges, extracted from the C–V curves, is found to mainly follow a sheet charge model rather than a bulk charge model. Therefore, the electron injection phenomenon is evaluated by using linear fitting. It is found that most of the trapped charges are not distributed exactly at the interface but are located in the bulk of the Al2O3 layers, especially close to the border. Furthermore, there is no detectable oxide interface layer in the x-ray photoelectron spectroscope(XPS) and transmission electron microscope(TEM)measurements. In addition, Rutherford back scattering(RBS) analysis shows that the width of the Al2O3/SiC interface is less than 1 nm. It could be concluded that the charge trapping sites in Al2O3/SiC structure might mainly originate from the border traps in Al2O3 film rather than the interface traps in the interfacial transition layer.展开更多
High-temperature annealing of the atomic layer deposition （ALD） of Al2O3 films on 4H-SiC in O 2 atmosphere is studied with temperature ranging from 800℃ to 1000℃. It is observed that the surface morphology of Al2O...High-temperature annealing of the atomic layer deposition （ALD） of Al2O3 films on 4H-SiC in O 2 atmosphere is studied with temperature ranging from 800℃ to 1000℃. It is observed that the surface morphology of Al2O3 films annealed at 800℃ and 900℃ is pretty good, while the surface of the sample annealed at 1000℃ becomes bumpy. Grazing incidence X-ray diffraction （GIXRD） measurements demonstrate that the as-grown films are amorphous and begin to crystallize at 900℃. Furthermore, C–V measurements exhibit improved interface characterization after annealing, especially for samples annealed at 900℃ and 1000℃. It is indicated that high-temperature annealing in O2 atmosphere can improve the interface of Al2O3 /SiC and annealing at 900℃ would be an optimum condition for surface morphology, dielectric quality, and interface states.展开更多
We investigate the effects of NO annealing and forming gas （FG） annealing on the electrical properties of a SiO2/SiC interface by low-temperature conductance measurements. With nitrogen passivation, the density of i...We investigate the effects of NO annealing and forming gas （FG） annealing on the electrical properties of a SiO2/SiC interface by low-temperature conductance measurements. With nitrogen passivation, the density of interface states （DIT） is significantly reduced in the entire energy range, and the shift of flatband voltage, AVFB, is effectively suppressed to less than 0.4 V. However, very fast states are observed after NO annealing and the response frequencies are higher than 1 MHz at room temperature. After additional FG annealing, the DIT and AVFB are further reduced. The values of the DIT decrease to less than 1011 cm-2 eV- 1 for the energy range of Ec - ET 〉/0.4 eV. It is suggested that the fast states in shallow energy levels originated from the N atoms accumulating at the interface by NO annealing. Though FG annealing has a limited effect on these shallow traps, hydrogen can terminate the residual Si and C dangling bonds corresponding to traps at deep energy levels and improve the interface quality further. It is indicated that NO annealing in conjunction with FG annealing will be a better post-oxidation process method for high performance SiC MOSFETs.展开更多
基于Silvaco仿真得到3 300 V SiC PiN二极管器件优化结构,开展了SiC刻蚀工艺和欧姆接触工艺研发,制备出具有倾角为48°的缓变台面结构和比接触电阻率在10-5Ω·cm^2量级的欧姆接触的SiC PiN二极管。所研制出的PiN器件最高反向...基于Silvaco仿真得到3 300 V SiC PiN二极管器件优化结构,开展了SiC刻蚀工艺和欧姆接触工艺研发,制备出具有倾角为48°的缓变台面结构和比接触电阻率在10-5Ω·cm^2量级的欧姆接触的SiC PiN二极管。所研制出的PiN器件最高反向阻断能力达到4 000 V,在100 A/cm^2的正向电流密度下正向导通压降为3.4 V。该器件的品质因数(FOM)达到2 461 MW/cm^2,目前在国内处于领先水平。展开更多
文摘高温可靠性是目前限制SiC MOSFET晶体管高温应用的关键问题之一。本文介绍了基于国内碳化硅器件工艺平台研制的1 200 V SiC MOSFET器件的直流特性,并通过高温栅偏(HTGB)和高温反偏(HTRB)试验对器件高温可靠性进行测试分析。试验结果表明:所研制的1 200 V SiC MOSFET器件在经过168 h的HTGB和HTRB可靠性试验后,所有测试器件的击穿电压>1 200 V,阈值电压偏移量<15%,导通电阻偏移量<15%,显示出优良的器件鲁棒性,也初步证明了国产SiC MOSFET器件的设计、工艺及其研制的可行性。
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61106080 and 61275042)the National Science and Technology Major Project of the Ministry of Science and Technology of China(Grant No.2013ZX02305)
文摘Tung＇s model was used to analyze anomalies observed in Ti/Si C Schottky contacts. The degree of the inhomogeneous Schottky barrier after annealing at different temperatures is characterized by the ‘T0anomaly＇ and the difference（△Φ）between the uniformly high barrier height（Φ0B） and the effective barrier height（Φeff B）. Those two parameters of Ti Schottky contacts on 4H–Si C were deduced from I–V measurements in the temperature range of 298 K–503 K. The increase in Schottky barrier（SB） height（ΦB） and decrease in the ideality factor（n） with an increase measurement temperature indicate the presence of an inhomogeneous SB. The degree of inhomogeneity of the Schottky barrier depends on the annealing temperature, and it is at its lowest for 500-°C thermal treatment. The degree of inhomogeneity of the SB could reveal effects of thermal treatments on Schottky contacts in other aspects.
基金supported by the National Natural Science Foundation of China(Nos.61106080,61275042)the National Science and Technology Major Project of the Ministry of Science and Technology of China(No.2013ZX02305)
文摘The Ni/Ti/Ni multilayer ohmic contact properties on a 4H-SiC substrate and improved adhesion with the Ti/Au overlayer have been investigated. The best specific contact resistivity of 3.16 × 10^-5 Ω.cm^2 was obtained at 1050 ℃. Compared with Ni/SiC ohmic contact, the adhesion between Ni/Ti/Ni/SiC and the Ti/Au overlayer was greatly improved and the physical mechanism under this behavior was analyzed by using Raman spectroscopy and X-ray energy dispersive spectroscopy （EDS） measurement. It is shown that a Ti-carbide and Ni-silicide compound exist at the surface and there is no graphitic carbon at the surface of the Ni/Ti/Ni structure by Raman spectroscopy, while a large amount of graphitic carbon appears at the surface of the Ni/SiC structure, which results in its bad adhesion. Moreover, the interface of the Ni/Ti/Ni/SiC is improved compared to the interface of Ni/SiC.
基金Supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China under Grant No 2013ZX02305
文摘The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors （VDMOSFETs） are reported. The drift layer is 17μm in thickness with 5 × 10^15 cm^-3 n-type doping, and the channel length is 1μm. The MOSFETs show a peak mobility of 17cm2/V.s and a typical threshold voltage of 3 V. The active area of 0.028cm2 delivers a forward drain current of 7A at Vcs = 22 V and VDS= 15 V. The specific on-resistance （Ron,sv） is 18mΩ.cm2 at VGS= 22 V and the blocking voltage is 1975 V （IDS 〈 lOOnA） at VGS = 0 V.
基金supported by the National Natural Science Foundation of China(Grant No.61106080)the National Science and Technology Major Project of the Ministry of Science and Technology of China(Grant No.2013ZX02305)
文摘Charge trapping behavior and its origin in Al2O3/SiC MOS structure are investigated by analyzing the capacitance–voltage(C–V) hysteresis and the chemical composition of the interface. The C–V hysteresis is measured as a function of oxide thickness series for an Al2O3/SiC MIS capacitor. The distribution of the trapped charges, extracted from the C–V curves, is found to mainly follow a sheet charge model rather than a bulk charge model. Therefore, the electron injection phenomenon is evaluated by using linear fitting. It is found that most of the trapped charges are not distributed exactly at the interface but are located in the bulk of the Al2O3 layers, especially close to the border. Furthermore, there is no detectable oxide interface layer in the x-ray photoelectron spectroscope(XPS) and transmission electron microscope(TEM)measurements. In addition, Rutherford back scattering(RBS) analysis shows that the width of the Al2O3/SiC interface is less than 1 nm. It could be concluded that the charge trapping sites in Al2O3/SiC structure might mainly originate from the border traps in Al2O3 film rather than the interface traps in the interfacial transition layer.
基金the National Natural Science Foundation of China(Grant No.61106080)the Major Program of the National Natural Science Foundation of China(Grant No.2013ZX02305)
文摘High-temperature annealing of the atomic layer deposition （ALD） of Al2O3 films on 4H-SiC in O 2 atmosphere is studied with temperature ranging from 800℃ to 1000℃. It is observed that the surface morphology of Al2O3 films annealed at 800℃ and 900℃ is pretty good, while the surface of the sample annealed at 1000℃ becomes bumpy. Grazing incidence X-ray diffraction （GIXRD） measurements demonstrate that the as-grown films are amorphous and begin to crystallize at 900℃. Furthermore, C–V measurements exhibit improved interface characterization after annealing, especially for samples annealed at 900℃ and 1000℃. It is indicated that high-temperature annealing in O2 atmosphere can improve the interface of Al2O3 /SiC and annealing at 900℃ would be an optimum condition for surface morphology, dielectric quality, and interface states.
基金supported by the National Natural Science Foundation of China(Nos.61106080,61275042)the National Science and Technology Major Project of the Ministry of Science and Technology of China(No.2013ZX02305)
文摘We investigate the effects of NO annealing and forming gas （FG） annealing on the electrical properties of a SiO2/SiC interface by low-temperature conductance measurements. With nitrogen passivation, the density of interface states （DIT） is significantly reduced in the entire energy range, and the shift of flatband voltage, AVFB, is effectively suppressed to less than 0.4 V. However, very fast states are observed after NO annealing and the response frequencies are higher than 1 MHz at room temperature. After additional FG annealing, the DIT and AVFB are further reduced. The values of the DIT decrease to less than 1011 cm-2 eV- 1 for the energy range of Ec - ET 〉/0.4 eV. It is suggested that the fast states in shallow energy levels originated from the N atoms accumulating at the interface by NO annealing. Though FG annealing has a limited effect on these shallow traps, hydrogen can terminate the residual Si and C dangling bonds corresponding to traps at deep energy levels and improve the interface quality further. It is indicated that NO annealing in conjunction with FG annealing will be a better post-oxidation process method for high performance SiC MOSFETs.
