A differential low-voltage high gain current-mode integrated RF front end for an 802.1 lb WLAN is proposed. It contains a differential transeonductance low noise amplifier （Gm-LNA） and a differential current- mode d...A differential low-voltage high gain current-mode integrated RF front end for an 802.1 lb WLAN is proposed. It contains a differential transeonductance low noise amplifier （Gm-LNA） and a differential current- mode down converted mixer. The single terminal of the Gm-LNA contains just one MOS transistor, two capacitors and two inductors. The gate source shunt capacitors, Cx1 and Cx2, can not only reduce the effects of gate-source Cgs on resonance frequency and input-matching impedance, but they also enable the gate inductance Lgl,2 to be selected at a very small value. The current-mode mixer is composed of four switched current mirrors. Adjusting the ratio of the drain channel sizes of the switched current mirrors can increase the gain of the mixer and accordingly increase the gain of RF receiver front-end. The RF front-end operates under 1 V supply voltage. The receiver RFIC was fabricated using a chartered 0. 18 μm CMOS process. The integrated RF receiver front-end has a measured power conversion gain of 17.48 dB and an input referred third-order intercept point （IIP3） of-7.02 dBm. The total noise figure is 4.5 dB and the power is only 14 mW by post-simulations.展开更多
A memristive Hopfield neural network(MHNN)with a special activation gradient is proposed by adding a suitable memristor to the Hopfield neural network(HNN)with a special activation gradient.The MHNN is simulated and d...A memristive Hopfield neural network(MHNN)with a special activation gradient is proposed by adding a suitable memristor to the Hopfield neural network(HNN)with a special activation gradient.The MHNN is simulated and dynamically analyzed,and implemented on FPGA.Then,a new pseudo-random number generator(PRNG)based on MHNN is proposed.The post-processing unit of the PRNG is composed of nonlinear post-processor and XOR calculator,which effectively ensures the randomness of PRNG.The experiments in this paper comply with the IEEE 754-1985 high precision32-bit floating point standard and are done on the Vivado design tool using a Xilinx XC7 Z020 CLG400-2 FPGA chip and the Verilog-HDL hardware programming language.The random sequence generated by the PRNG proposed in this paper has passed the NIST SP800-22 test suite and security analysis,proving its randomness and high performance.Finally,an image encryption system based on PRNG is proposed and implemented on FPGA,which proves the value of the image encryption system in the field of data encryption connected to the Internet of Things(Io T).展开更多
基金Project supported by the National Natural Science Foundation of China(No.60776021)the Open Fund Project of Key Laboratory in Hunan Universities,China(No.10K016)
文摘A differential low-voltage high gain current-mode integrated RF front end for an 802.1 lb WLAN is proposed. It contains a differential transeonductance low noise amplifier （Gm-LNA） and a differential current- mode down converted mixer. The single terminal of the Gm-LNA contains just one MOS transistor, two capacitors and two inductors. The gate source shunt capacitors, Cx1 and Cx2, can not only reduce the effects of gate-source Cgs on resonance frequency and input-matching impedance, but they also enable the gate inductance Lgl,2 to be selected at a very small value. The current-mode mixer is composed of four switched current mirrors. Adjusting the ratio of the drain channel sizes of the switched current mirrors can increase the gain of the mixer and accordingly increase the gain of RF receiver front-end. The RF front-end operates under 1 V supply voltage. The receiver RFIC was fabricated using a chartered 0. 18 μm CMOS process. The integrated RF receiver front-end has a measured power conversion gain of 17.48 dB and an input referred third-order intercept point （IIP3） of-7.02 dBm. The total noise figure is 4.5 dB and the power is only 14 mW by post-simulations.
基金supported by the Scientific Research Fund of Hunan Provincial Education Department(Grant No.21B0345)the Postgraduate Scientific Research Innovation Project of Changsha University of Science and Technology(Grant Nos.CX2021SS69 and CX2021SS72)+3 种基金the Postgraduate Scientific Research Innovation Project of Hunan Province,China(Grant No.CX20200884)the Natural Science Foundation of Hunan Province,China(Grant Nos.2019JJ50648,2020JJ4622,and 2020JJ4221)the National Natural Science Foundation of China(Grant No.62172058)the Special Funds for the Construction of Innovative Provinces of Hunan Province,China(Grant Nos.2020JK4046 and 2022SK2007)。
文摘A memristive Hopfield neural network(MHNN)with a special activation gradient is proposed by adding a suitable memristor to the Hopfield neural network(HNN)with a special activation gradient.The MHNN is simulated and dynamically analyzed,and implemented on FPGA.Then,a new pseudo-random number generator(PRNG)based on MHNN is proposed.The post-processing unit of the PRNG is composed of nonlinear post-processor and XOR calculator,which effectively ensures the randomness of PRNG.The experiments in this paper comply with the IEEE 754-1985 high precision32-bit floating point standard and are done on the Vivado design tool using a Xilinx XC7 Z020 CLG400-2 FPGA chip and the Verilog-HDL hardware programming language.The random sequence generated by the PRNG proposed in this paper has passed the NIST SP800-22 test suite and security analysis,proving its randomness and high performance.Finally,an image encryption system based on PRNG is proposed and implemented on FPGA,which proves the value of the image encryption system in the field of data encryption connected to the Internet of Things(Io T).
