This work demonstrates that the ΣΔ modulator with a low oversampling ratio is a viable option for the high-resolution digitization in a low-voltage environment.Low power dissipation is achieved by designing a low-OS...This work demonstrates that the ΣΔ modulator with a low oversampling ratio is a viable option for the high-resolution digitization in a low-voltage environment.Low power dissipation is achieved by designing a low-OSR modulator based on differential cascade architecture,while large signal swing maintained to achieve a high dynamic range in the low-voltage environment.Operating from a voltage supply of 1.8V,the sixth-order cascade modulator at a sampling frequency of 4-MHz with an OSR of 24 achieves a dynamic range of 81dB for a 80-kHz test signal,while dissipating only 5mW.展开更多
A CMOS charge-pump circuit with adjustable current is presented.A bandgap voltage reference,a low drop-out regulator,and a capacitive DC-DC voltage-booster are used to generate supply voltage for the current reference...A CMOS charge-pump circuit with adjustable current is presented.A bandgap voltage reference,a low drop-out regulator,and a capacitive DC-DC voltage-booster are used to generate supply voltage for the current reference.This generated voltage is insensitive to the changes of external power supply voltage and temperature,while the current reference itself is insensitive to temperature.The circuit is designed in 0.18μm 1.8V standard digital CMOS process.The simulated results show that the performance of the circuit is satisfied.展开更多
文摘This work demonstrates that the ΣΔ modulator with a low oversampling ratio is a viable option for the high-resolution digitization in a low-voltage environment.Low power dissipation is achieved by designing a low-OSR modulator based on differential cascade architecture,while large signal swing maintained to achieve a high dynamic range in the low-voltage environment.Operating from a voltage supply of 1.8V,the sixth-order cascade modulator at a sampling frequency of 4-MHz with an OSR of 24 achieves a dynamic range of 81dB for a 80-kHz test signal,while dissipating only 5mW.
文摘A CMOS charge-pump circuit with adjustable current is presented.A bandgap voltage reference,a low drop-out regulator,and a capacitive DC-DC voltage-booster are used to generate supply voltage for the current reference.This generated voltage is insensitive to the changes of external power supply voltage and temperature,while the current reference itself is insensitive to temperature.The circuit is designed in 0.18μm 1.8V standard digital CMOS process.The simulated results show that the performance of the circuit is satisfied.
