摘要
为了实现对车辆电子设备组合逻辑电路的功耗估计,提出了一种基于概率建模的功耗估计方法.通过对CMOS电路能耗的简化模型分析,得到CMOS逻辑门消耗的平均功率与门的开关量直接相关;以及通过分析使门发生转换所满足的一组布尔函数,计算出在任意特定时间点每个门发生转换的转换概率,然后把全部门的这些概率加起来,获得整个组合逻辑电路在对应于一个时钟周期的所有时间点的开关量;最后建立起一般组合逻辑网络的功耗估计概率模型以及考虑不同延迟模型条件下的功耗估计.实验结果表明,提出的基于概率建模的组合逻辑电路的功耗估计方法相比于传统的随机逻辑仿真方法,不仅在功耗估计方面更加准确,而且实现功耗估计所执行的时间更短.这对于把功耗估计作为设计目标之一的现代组合逻辑电路的设计来说具有十分重要的意义.
In this paper,a probabilistic modeling method is proposed to estimate the power consumption of combinational logic circuits of vehicle electronic equipment.The simplified model of CMOS circuit energy consumption is analyzed,and the average power consumption of logic gate is directly related to the switching value of gate.A set of Boolean functions for gate conversion are analyzed,and the conversion probability of each gate at any specific time point is calculated.Then,the probability of all gates is added up to obtain the total power consumption of the whole combinational logic circuit corresponding to a clock cycle.Finally,the power estimation probability model of general combinational logic network and the power estimation considering different delay models are established.The experimental results show that the proposed power estimation method based on probabilistic modeling is not only more accurate in power estimation,but also has shorter execution time than the traditional random logic simulation method.This is of great significance for the design of modern combinational logic circuits,which takes power estimation as one of the design objectives.
作者
赵海发
ZHAO Hai-fa(Department of Electrical Engineering,Jiyuan Vocational and Technical College,Jiyuan Henan454650,China)
出处
《菏泽学院学报》
2020年第5期24-30,共7页
Journal of Heze University
基金
国家自然科学基金项目(51375145)。
关键词
车辆电子设备
组合逻辑电路
功耗估
精确度
vehicle electronic equipment
combinational logic circuits
power dissipation estimation
accuracy
